This invention belongs to the field of data processing technology, specifically, it is a kind of multi-functional arithmetic apparatus with multi-value states, and is the core technology for high speed and high performance computers, computer networks, exchange and control systems.
The architecture of the Von Neumann machine has been used on computers that represent the advanced data processing technology until now since 1940s when they were invented. Such a computer is mainly characterized by: firstly, programs are stored in the internal memory and processing is in serial; secondly, the storage address and the storage contents are separated; thirdly, can only execute certain programs passively. Although computer technologies have experienced significant development during the last fifty years, limitations brought forth by the traditional computer architecture become more and more obvious. Since the functions of the hardware of such computers only essentially contains two manipulations, which are shifting and addition, software algorithms are relatively aligned with the hardware functions and structure when the hardware is used for numerical operations. But when it is used for non-numerical operations, the software and hardware are not as aligned, mainly due to the fact that data or knowledge are not related to each other when they are stored and can be related only when they are communicated through the address, whereby such communication can not exceed the limitation of linear two-value logic, and encounters relatively significant limitation during logical inference. The two-value logic is the simplest system in formalization, and must convert each problem into a sum of logically infinite smallness before process one item after another on the same logical layer. Actually, intelligence is the macroscopic effect of the system, its multi-route input information sometimes needs to be interacted and in parallel at the same time, i.e. needs parallel conversion or operation of multiple values or multiple logical layers, and can not be represented completely by two-value or binary trees in two-value logic. Therefore, it is impossible to construct the hardware logic system with the same architecture as that of human brain by using two-value logic. While increasingly growth of the IT industry as well as modern science and technology initiate more and higher demands for computers. In fact, there are unlimited intermediate states between good and bad or existence and non-existence. Therefore, as the information processing tool that mimics human brain, a computer must be able to adapt to the actual demands for information processing. It is hence imperative for the computer to breakthrough the current state of the two-value logic, i.e. there is either 0 or 1, either good or bad, either existence or non-existence, without any intermediate states.
The object of this invention is to breakthrough the limitation of the existing neural network, and provide a general multi-value logic neural network aimed at resembling the mechanism of structure and function of the neural network of the human brain, based on which to design a kind of multi-value arithmetic apparatus.
The another objective of this invention is to realize reciprocal logic using the operation relationship of addition and subtraction, based on which to design a kind of multi-purpose and multi-state logic reciprocal arithmetic apparatus which combines the functions of operation, exchange and control.
A further objective of this invention is to design in combination of modern microelectronic technology a kind of multi-value arithmetic apparatus bit slice with selectable number systems in the form of bit slices.
This invention has been designed on the basis of integer cluster modelxe2x80x94a component of quasi holographic element mathematics modelxe2x80x94as the logical structure model. Specifically, it is comprised of a gating array, which is made of gating devices in the structural form of n rowsxc3x97m columns, with each gating device having at least two input pins and at least one output pins; one of the input pins of each of the gating devices on the same row is connected to each other as a row input contact, the second pin of each of the gating devices on the same column is connected to each other as a column input contact, variable input value statesxe2x80x94weightxe2x80x94exist between the row input contacts, similarly, variable input value statesxe2x80x94weightxe2x80x94exist between the column input contacts. Also, there is a correspondence relationship between the input value state of each gating device and its position in the array. The value of the input value state of the row input contact shall be in the range of 0 to (nxe2x88x921), while the value of the input value state of the column input contact shall be in the range of 0 to (mxe2x88x921); Each output pin of those gating devices also has an output value state. An arithmetic relationship exists between the output value state of each gating device and its input value state based on the self organization principle model of the integer cluster. Output pins of those gating devices with the same operational output value state are connected together via an isolating circuit as an output contact. The output value state of the output contact shall be within the range of 0 to (n+mxe2x88x921); while the output of the output value state is determined via gating of the gating device.
The relationship between the output value state and input value state of the gating array is defined based on an operational relationship that is represented by the integer cluster model. A certain operational relationship thus exists between the two after definition. While, operation is realized only via the gating of the gating device, i.e. arithmetic operation is realized via the structural operation.
Such a structural operation that is realized via the gating array with multi-value states is characterized by unification of data and address as well as storage and calculation, accommodation between the algorithm and structure, accommodation between the position of the input/output contact and the bit value, accommodation between the operational relationship and the bit value, and direct mapping of the algorithm to the parallel multiple dimension architecture of the information processing system.
Such kind of multi-value and multiple dimension arithmetic array can be widely used in routing selection, exchange matrix, position control, point control, and digital control technologies.
Such mathematics operation can be a dual direction input/output logical reversible operation that is realized by any of addition, subtraction, combination of addition and subtraction, and combination of one addition and two subtraction.
On the basis of the above mentioned multi-value arithmetic apparatus, unification of analog and digital operations as well as unification of data and address can be accomplished by using the modern microelectronic technology and adding external circuits that possess carry, borrow, number system determination, complementary conversion functions to construct a new arithmetic unit bit slice. Such unification can allow new generation computers to breakthrough the limitation of linear two-value logic, and maximize the resemblance with the structure and function of human brain during logical inference.